Silicon Valley

California, USA






You know you need custom silicon to be competitive in the marketplace.

  • Have you been searching for a silicon expert you can trust to integrate your product into a chip?

  • Do you wish you did not have to spend millions of dollars and almost a year to develop a custom chip, when the useful life of your product is only 2-3 years?

  • Do bugs before tapeout keep you up at night?

  • Do you wish you had the time and expertise to set up a good mixed signal verification methodology that can help your team quickly implement new functionality with first silicon success?

  • Do first silicon bugs set back your product development schedule?

  • Do silicon revisions and ECOs wreak havoc with your budget and customer deliverables?

Most electronic design leaders struggle with these same questions.

You are not alone and we are here to help.

Bugs are no fun. Don’t be held back. You were designed for more.

You are not alone and we are here to help.

  • Experienced director of Analog Mixed-signal System and Verification responsible for a global team that performed AMS verification of complex touch controllers.

contributed to the success of Synaptics over 15 years. During his tenure Rafael took responsibilities as design manager, silicon architect, and AMS verification lead. He was the chip lead for some of the most successful touch controller chips Synaptics manufactured [… and] spearheads our AMS verification efforts. Under his leadership several complex chips taped out with excellent AMS verification coverage. Rafael is a strong technical leader with a proven track record.
– Ozan Erdogan, Vice-President of Silicon Engineering, Synaptics Inc.

  • System Silicon Architect with 35+ tapeouts of digital/analog CMOS IC design experience, directly responsible for the design and release to production of over a billion units.

“excellent engineer and leader during the time I worked with him. He was always our go-to guy to solve the most complex of problems, to make sense of large/confusing data or to institute processes to ensure that problems were tackled methodically and in a repeatable manner […] drove the transition towards a cutting edge SystemVerilog-based AMS verification methodology that was instrumental in improving coverage for all touch and TDDI ASICs at Synaptics. I have a great deal of respect for Rafael and his leadership and think he would be a great asset to any team.”
– Prashant Shamarao, Vice-President of IoT Silicon Engineering, Synaptics Inc.

  • Experienced in complete product lifecycle, from initial conception through design, verification, fabrication & testing, driven by project success and the success of the team.

“an outstanding leader and collaborator. Rafael’s primary activities were in the analog ASIC design and verification, however I could always rely on his broad experience to consult on system level implications and trade-offs (whether in touch/display architecture, analog signalling or RF and noise). In addition to creating innovative solutions, Rafael could and did communicate his ideas methodically and effectively. As a designer and a manager Rafael has demonstrated excellent mentoring capabilities and creative management strategies to overcome difficult technical and resourcing challenges: on multiple occasions our teams exchanged personnel – to the benefit of those personnel and to the company. Rafael delivered on his commitments, led his teams and carefully listened and collaborated with his colleagues.”
– Andrew Spray, Sr. Manager Systems Platform Engineering, Synaptics Inc.

You are not alone and we are here to help.

Our Services:

  • System Silicon Architecture
  • Custom Silicon Development
  • Silicon Project Planning and Management
  • Analog Mixed-signal Methodology & Verification

You are not alone and we are here to help.

How it Work, 3 easy Steps:

  • ANALYZE – We review your existing methodology and quality controls, assess strengths, weaknesses, and opportunities for improvement.

  • PLAN – We review and assess strengths and coverage of your verification plan and provide specific recommendations for improvement.

  • SOAR – We participate in your verification review for tapeout sign-off to assure compliance with the plan. Provide specific action items to the team for additional tests & improved coverage.

You are not alone and we are here to help.

As a Gift, Download this free PDF

I had the privilege of working and befriending an extraordinary colleague, Hans Camenzind, analog designer of the first monolithic PLL and the legendary 555 timer. It was Hans who unknowingly sparked my interest as a teenager in a career in chip design. Here is a FREE download of his insightful book, Designing Analog Chips. With an emphasis on practical designs and their historical development, this book is comprehensible to engineers with a non-analog background.

Enjoy the Road to Working Silicon, the First Time, and Every Time!